FDTC 2019 – Sixteenth Workshop on Fault Diagnosis and Tolerance in Cryptography

August 24-th, 2019, Atlanta, USA (co-located with CHES 2019)

FDTC 2019 is held in cooperation with IACR (www.iacr.org).

Fault injection is one of the most exploited means for extracting
confidential information from embedded devices and for compromising
their intended operation. Therefore, research on established as well as
upcoming methodologies, and techniques for fault injection,
architectures and design tools for the design of robust and protected
cryptographic systems and embedded devices (both hardware and software),
are essential. Fault injection case studies on popular categories of
embedded devices like mobile phones, industrial control devices,
hardware wallets for cryptocurrencies, security tokens, etc., are of high
interest to improve the understanding of the implications on realistic
applications.

FDTC is the reference event in the field of fault injection appliances,
fault attacks and countermeasures.

Topics of interest include but are not limited to:

  - Fault injection setups and praxis:
    - novel and improved mechanisms for fault injection, e.g., using
      lasers, electromagnetic induction, or clock / power supply manipulation
    - practical issues in fault injection setups and validation results
    - practical limitations of attacks and implications for security

  - Case studies:
    - attacks on cryptographic implementations
    - attacks on embedded devices like mobile phones, industrial control devices,
      hardware wallets for cryptocurrencies, security tokens, smartcards, etc.
    - validation of earlier results

  - Related highly-invasive attacks on device security:
    - setups and practical results from invasive attacks, such as photonic
      emission analysis, laser thermal imaging, laser-voltage imaging, etc.
    - practical issues, limitations and potential

  - Countermeasures (detection, resistance and tolerance):
    - countermeasures for cryptographic implementations
    - countermeasures for firmware of embedded devices, e.g., for bootloaders
    - detection countermeasures, e.g., control flow integrity
    - HW/SW co-design countermeasures for CPU architectures

  - Design tools for analysis of fault attacks and countermeasures:
    - early estimation of fault attack robustness
    - automatic applications of fault countermeasures

Important dates (2019):

  Submission deadline with rebuttal:     May  25
  Submission deadline without rebuttal:  June 18
  Notification of final acceptance:      July 18
  Final version (camera-ready):          July 26
  Workshop:                              Aug. 24

Program chairs:

  Johann Heyszl                 Fraunhofer AISEC
  Colin O'Flynn                 NewAE, Dalhousie Univ.

Program committee:

  Michel Agoyan                 ST Microelectronics
  Josep Balasch                 KU Leuven
  Lejla Batina                  Radboud University
  Shivam Bhasin                 NTU Singapore
  Ileana Buhan                  Riscure
  Fabrizio De Santis            SIEMENS AG
  Jean-Max Dutertre             ENS des Mines de S. Etienne
  Junfeng Fan                   Open Security Research
  Wieland Fischer               Infineon Technologies
  Sylvain Guilley               Telecom ParisTech
  Thiebeauld Hugues             eshard
  Mehran Mozaffari Kermani      University of South Florida
  Heiko Lohrke                  TU Berlin
  Philippe Loubet Moundi        Gemalto
  Debdeep Mukhopadhyay          IIT Kharagpur
  Dmitry Nedospasov             Toothless Consulting, Inc.
  David Oswald                  University of Birmingham
  Gerardo Pelosi                Politecnico di Milano
  Ilia Polian                   University of Stuttgart
  Robert Primas                 Graz University of Technology
  Patrick Schaumont             Virginia Tech.
  Falk Schellenberg             Ruhr University Bochum
  Takeshi Sugawara              UEC Tokyo
  Shahin Tajik                  University of Florida
  Michael Tunstall              Cryptography Research
  Vincent Verneuil              NXP Semiconductors
  Fan Zhang			Zhejiang University

Chairs (general, publication, finance):

  Guido Marco Bertoni           Security Patterns
  Luca Breveglieri              Politecnico di Milano
  Israel Koren                  Univesrity of Massachusetts

Steering committee:

  Luca Breveglieri              Politecnico di Milano
  Israel Koren                  University of Massachusetts
  David Naccache (chair)        ENS de Paris
  Jean-Pierre Seifert           TU Berlin & T-Labs

Instructions for authors:

Submissions must not substantially duplicate work that any of the authors have published
elsewhere or that has been  submitted in parallel to any other conference or workshop.
Submissions should be anonymous, with no author names,  affiliations, acknowledgments,
or obvious references. Papers should be up to 8 pages (including the bibliography and
appendices) and must be formatted following the instructions in the provided template.

Authors may opt for an early submission with rebuttal. See the submission dates.

Submission of final papers will be managed directly by Conference Publishing Services
(CPS). CPS will contact the authors with instructions and will send links for uploading
the manuscripts.

Accepted papers will be published in an archival proceedings volume by CPS and will be
distributed at the time of the workshop.

At least one author of each accepted paper must register for the workshop and present
the paper in order to be included in the proceedings. Additional submission instructions
and further information can be found at:

   www.fdtc-workshop.eu