NEW 6th WORKSHOP ON FAULT DIAGNOSIS
AND TOLERANCE IN CRYPTOGRAPHY - FDTC 2009
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Call for Participation |
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5th
WORKSHOP ON FAULT DIAGNOSIS AND TOLERANCE
IN CRYPTOGRAPHY - FDTC 2008
http://fdtc.deib.polimi.it/FDTC08/
Washington DC, USA –
Sunday, August 10, 2008
Mayflower,
Marriott Renaissance Hotel
(one day prior to CHES
2008 – located in the same hotel as CHES)
CHES 2008 WEB SITE (http://www.chesworkshop.org/)
The workshop is
located in the Colonial Room of the Mayflower Hotel.
PROGRAMME
– LIST OF
PARTICIPANTS
PRESENTATION SLIDES
– PROCEEDINGS
This year’s FDTC workshop will feature two invited talks:
Silicon-Level Solutions
to counteract Passive and Active Attacks
Sylvain Guilley, Institut Telecom, Département COMELEC, Paris, France
Aspects of the
Development of Fault Resistant Hardware
Wieland Fischer, Infineon Technologies, München, Germany
REGISTRATION
Early
registration rates (before July 17):
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$ 260 regular
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$ 200 student (only full-time students)
Late registration rates (after July 17 but before August 6):
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$ 330 regular
- $ 260 student
The registration fee includes proceedings, continental breakfast, lunch and two coffee breaks. Credit cards (Visa, Mastercard, Amex and Discover) will be accepted only prior to August 6, 2008. If you register on-site you must pay in cash. The registration fee can be refunded only if a cancellation request is received before August 1, 2008. A cancellation fee of $ 50 will be applied.
ACCOMMODATION
The CHES hotel (the Mayflower Renaissance
Hotel, 1127 Connecticut Ave., Washington, DC, USA), has agreed to extend
the CHES special rate of $ 209 to Saturday August 9, 2008 as well. However, the
current rate for this weekend night, on their web site, is only $ 199, so you
may want to take advantage of this now.
WORKSHOP
TOPICS AND ORGANIZATION
In
recent years applied cryptography has developed considerably, to satisfy the
increasing security requirements of various information technology disciplines,
e.g., telecommunications, networking, data base systems and mobile
applications. Cryptosystems are inherently computationally complex and in order
to satisfy the high throughput requirements of many applications, they are
often implemented by means of either VLSI devices (crypto-accelerators) or
highly optimised software routines (crypto-libraries) and are used via suitable
(network) protocols.
The high complexity of such implementations raises concerns regarding their reliability. Research is therefore needed to develop methodologies and techniques for designing robust cryptographic systems (both hardware and software), and to protect them against both accidental faults and intentional intrusions and attacks, in particular those based on the malicious injection of faults into the device for the purpose of extracting the secret key.
This
annual workshop was started in 2004 and had follow-ups in 2005, 2006 and 2007.
See the links:
FDTC04 – FDTC05 – FDTC06 – FDTC07 (http://fdtc.deib.polimi.it/FDTC07)
Contributions to the workshop
describing theoretical studies and practical case studies of fault diagnosis
and tolerance in cryptographic systems (HW and SW) and protocols are solicited.
Topics of interest include, but are not limited to:
·
modelling the reliability of cryptographic systems
and protocols
·
inherently reliable cryptographic systems and
algorithms
·
faults and fault models for cryptographic
devices (HW and SW)
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reliability-based attack procedures on
cryptographic systems (fault-injection attacks) and protocols
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adapting classical fault diagnosis and
tolerance techniques to cryptographic systems
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novel fault diagnosis and tolerance techniques
for cryptographic systems
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attacks exploiting
micro-architecture components (cache, branch predictor etc.)
·
physical protection of DRM schemes against attacks
·
fault injection based attacks using FIB laser and
chemistry
·
case studies of attacks, reliability and fault
diagnosis and tolerance techniques in cryptographic systems
Workshop proceedings will be
published by IEEE-CS Press, will be available at the workshop and will be
included in the IEEE Computer Society online store. This will be the 3rd
volume, after that of FDTC 2006 (Springer-Verlag) and FDTC 2007 (IEEE-CS Press). To be
included in the FDTC 2008 proceedings, authors of accepted papers must
guarantee to present their contributions at the workshop.
Submission
deadline: April 1, 2008 - CLOSED
Notification
deadline: May 1, 2008 - CLOSED
Final paper
deadline: May 30, 2008
(electronic submission, see IEEE-CPS author kit) - CLOSED
Submissions:
extended abstracts of 5 to 10 pages, PDF format preferred.
E-mail the
extended abstract to david.naccache@ens.fr
and Jean-Pierre.Seifert@uibk.ac.at
Please provide name,
affiliation, telephone, fax number and email address.
Final papers must be
formatted and submitted following the instructions in the IEEE-CPS Author Kit.
Program
committee to include |
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Ramesh Karri Christof Paar Régis Leveugle Cetin Kaya Koç Jean-Marc Robert David M'Raihi Nathalie Feyt Guido Bertoni Mathieu Ciet Christophe Bidan Jean-Marc Robert |
Brooklyn Polytechnic University of
Ruhr TIMA Lab. Grenoble Oregon
State University École Tech. Sup. Monreal VeriSign Thales ST Microelectronics Private NISS France École de Tech. Sup., Canada |
Kaiji Wu Onur Aciicmez Jean-Sebastien Coron Julien Brouchier Benoit Chevallier-MamesJean-Louis LanetMarc JoyeHelena Handschuh Assia TriaWieland FisherPascal Guterman |
University of Illinois Samsung Univ. of
Luxembourg ISEN
France DCSSI
France University
of Limoges Thomson Spansion CEA-LETI
France Infineon LAM France |
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Organizers
and workshop series founders |
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Prof. Luca Breveglieri Dep. of Electronic and
Information Sciences Politecnico di Milano - Piazza
L. Da Vinci n. 32 Milano I-20133 – ITALY Tel: +39
(0) 2 2399 3653 Fax: +39
(0) 2 2399 3411 Email: breveglieri@elet.polimi.it |
Prof. Israel Koren Dep. of Electrical & Computer Engineering
University of Massachusetts Amherst MA 01003 – USA Tel: +01
(413) 545 2643 Fax: +01
(413) 545 1993 Email: koren@ecs.umass.edu |
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Scientific Program
co-Chairs for the 2008 workshop
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